Re: TI-H: More AVR Qs

To: ti-hardware@lists.ticalc.org
Subject: Re: TI-H: More AVR Qs
From: Grant Stockly <gussie@stockly.com>
Date: Mon, 11 Oct 1999 11:53:12 -0800
In-Reply-To: <3801B5E5.C16E15BB@cse.kau.se>
References: <v04020a07b424c40dd281@[24.237.5.4]> <v04020a00b426cadab7d8@[24.237.5.4]>
Reply-To: ti-hardware@lists.ticalc.org


>> Thats 5MIPS (million instructions per second).  PICs have a 1/4th ratio
>> between clock rate and instruction rate.
>>
>
>yes, 1/4 ratio !
>68k, HC11 etc. is far away from that.
>
>PIC need to read the data into the W-register and then store it in RAM. Which
>means, you need 2*4 clock-cycles to store data from a inport in RAM.
>
>
>>
>> AVRs are 1/1 (a 12MHz avr gets 12MIPS).
>>
>> There is a scenix, and it isn't totally PIC compatible.  When running the
>> Scenix in PIC mode it has to use the 1/4 rule.  When running in Scenix mode
>> it gets 1/1.
>>
>
>oaw.. thats really good. Where can I read about that microprocessor ?

The AVR stands for nothing (realy! :)  ) and can be found at www.atmel.com

>I have AVR's Risc Microcontroller data book, maybe its in there. : )

Probably.  :)

The 12MIPS avrs can be purchased for $1.60 each.  :)

References:

RE: TI-H: More AVR Qs

From: Grant Stockly <gussie@stockly.com>

Re: TI-H: More AVR Qs

From: Grant Stockly <gussie@stockly.com>

Re: TI-H: More AVR Qs

From: PerErik Klarenfjord <el8klap@cse.kau.se>