Re: LZ: Project Status Update: THE RAM EXPANDER WORKS!


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Re: LZ: Project Status Update: THE RAM EXPANDER WORKS!



Mel Tsai wrote:
> 
> After about 10 hours of total anguish, sweating and swearing, I
> finally figured out why my design didn't work, and more importantly, I
> fixed the problem!!!  I fixed the design by adding a single capacitor!
> I asked around on sci.electronics on how to use a resistor-capacitor
> time delay circuit (which I wasn't sure how to use), and someone
> responded.  The capacitor sets up an RC time delay, which delays the
> output of the buffer by a few microseconds.  That way, the "race"
> problem is corrected, allowing the latch to properly output the data.
> 
> I was able to manually send and receive commands to the chip for the
> first time today.  I haven't tested all the commands, but there's no
> reason why they shouldn't work.  It's weird knowing that I have the
> worlds first TI-85 with a whole megabyte of storage on it!
> 
> The value of the timing capacitor will have to be tweaked, because if
> the delay is too long, this will limit the maximum transferr speed.
> However, I don't think that the speed will be noticeably diminished.
> >From here on out, I'm going to be glued to Dos Edit, writing the
> (currently unfinished) send/receive software.  I've got to also
> rewrite the chip command send/receive routines, too, but that won't
> take very long.
> 
> I'll release the schematic within a day or two, but I'm really busy
> with some Java programs and a report that have to get done, so be
> patient.  Now that I know the reason why my design didn't work, I
> think it can be simplified even more.  A suggestion from Ed Plese Jr.
> got me thinking, and I now believe that the whole thing can be built
> with just a single 74HC126, the memory chip, a voltage regulator and a
> few capacitors.  This method is a bit slower, but then whole thing
> could then be built on a 1" by 2" pc board (my current design fits on
> a 1" by 3" pc board)!
> 
> I also got an idea for another (totally different) way to interface to
> the chip using an XOR gate and a clock divider, but since my design
> now works, I'm not going to investigate that possibility.
> 
> I've probably forgotten to mention something important...  oh well...
> 
> -Mel


Isn't this exciting?!  What a difference 1024K is to 28.8K.  I can't wait 
until I can get this thing working on my calc.  One question, this extra 
memory will only be accesed by ZShell or zshell programs, because you 
can't have it from TI-OS unless you use interuppts, right?


<pre>
-- 
Compliments of:
_-_-_-_-_-_-_-_
  Alan Bailey
  mailto:bailala@mw.sisna.com
  IRC:Abalone
  Web:http://www.mw.sisna.com/users/bailala/home.htm
</pre>


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