Re: TI-H: special component

To: ti-hardware@lists.ticalc.org
Subject: Re: TI-H: special component
From: Grant Stockly <gussie@alaska.net>
Date: Thu, 25 Jun 1998 22:01:32 -0900
Delivered-To: ti-hardware-outgoing@towerguard.unix.edu.sollentuna.se
In-Reply-To: <Pine.PCW.3.96.980618082414.3358C-100000@MICRON>
References: <199806180530.HAA06144@towerguard.unix.edu.sollentuna.se>
Reply-To: ti-hardware@lists.ticalc.org


A 20MHz pic wouldn't be able to do it...  It takes 2 instructions to out
and in a port so just to mirror output you'd need 40MHz.  There is a 50MHz
pic...

>On Thu, 18 Jun 1998, Jon Olson wrote:
>
>> Seeing as the PIC only operates at 10 Mhz and the network operates at 100
>
>Just a minor technicality, but I think the high-end PICs max at 20MHz..
>
>They take 4 clock cycles to make an instruction cycle, so it's getting 5
>MIPS. A 10 Mb/s (megabit) network (in theory) pushes 1.25 MB/s (megabyte)
>of data. So if you had some sort of a shift register taking the data from
>the network line and presenting it a byte at a time, then I think a 20
>MHz PIC would be able to switch 10 Mb/s network traffic. (Did I calculate
>all that correctly?) A 100 Mb/s network (also in theory) moves 12.5 MB/s
>down the line. Since a PIC can read its I/O ports in a single instruction
>cycle, it can take in 5 MB/s at 5 MIPS. So it has enough room left over to
>push 10 Mb/s traffic back out another port, but it doesn't have enough
>power to even read in a 100 Mb/s source without losing frames.
>
>So anyway, like Jon said, 100 Mb/s traffic is definitely out. But I think
>10 Mb/s might be possible... unless I don't have a clue what I'm doing,
>and that is also possible.
>
>--
>Greg Hill
>greg-hill@bigfoot.com
>www.comports.com/link

References:

Re: TI-H: special component

From: "Jon Olson" <morph@jmss.com>

Re: TI-H: special component

From: Greg Hill <gregh@xmission.com>