Re: A86: Batt Checker


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Re: A86: Batt Checker






>
>Dux Gregis wrote:
>> The main CPU clock becomes slower because it is used much more frequently
>> ... it has to send signals out all the time.  The interrupt clock,
though,
>> only has to send signals once every interrupt.
>
>  Not properly... the interrupt signal could have been derivated from
>  the same clock source as the z80 clock, dy a hardware divisor. In this
>case,
>  both clocks would maintain sincrony and no one would get slower tha
>the
>  other.

Which, as I pointed out initially, is not the case or else System Monitor
wouldn't work at all.

 Normally, if we need more than clock frequency in a system we
>  use one single clock and divide to obtain  the others, unless there's
>  some special reason to have separate clocks.
>  Crystal oscilators are used to make clocks that maintain the frequency
>  fixed, even with rather large voltage power. Clocks that vary in
>frequency
>  with the power voltage are normally 'RC' oscilators.
>  I got in front of me a manual from a certain microcontroler, wich has
>some
>  graphics of Frequency/Voltage(power) for an RC clock. For a variation
>of
>  1.5V in the power, the frequency can low down more than 1MHz.
>  One reason can think of for TI not using a crystal clock is space. But
>why
>  spare... well, I realise now that I'm too much out of knoledge to
>speculate.
>  I still have my first batterys, so, does the calc slow down when the
>  batterys are low?
>
>> The CPU clock must increment once every t-state where the interrupt clock
>> (I'm not completely sure about this) is controlled by a less power
intensive
>> _external_ clock.  Everything runs on the same batteries, so the things
in
>> hardware that consume the least amount of power are going to be the most
>> accurate.
>
>  NSJ aka Viriato
>  l41324@alfa.ist.utl.pt
>  nmasj@camoes.rnl.ist.utl.pt
>  http://camoes.rnl.ist.utl.pt/~nmasj - DemoAdict/TaradoPorDemos