[A83] Re: Official H**s Replacement Commands & Questions & PulseWidthMod


[Prev][Next][Index][Thread]

[A83] Re: Official H**s Replacement Commands & Questions & PulseWidthModulation




> HRC1: ex de,hl = push de \ push hl \ pop de \ pop hl ;this should work, I
> guess

HRC1a (recommended): 
	ex de, hl = push bc \ ld b,d \ ld c,e \ ld d,h \ ld e,l \
	ld h,b \ ld l,c\ pop bc
 
> HRC2: ld a,xx = push bc \ ld b,xx \ ld a,b \ pop bc
> More crap coming soon, maybe...
> Feel free to add other commands...

HRC3:  push hl = ld iy,0000h \ add iy,sp \ ld (iy+0),l \ ld (iy+1),h  
HRC3a: pop hl = ld iy,0000h \ add iy,sp \ ld l,(iy+0) \ ld h,(iy+1)


Ha ha ha, good joke
(more serious comments below)


> Question:
> 1 What does ldir do? Does it copy the graph buffer to the screen? In
>    ionm.z80 it's used to run a module stored in saferam1 (graph buffer?)
> 2 Is there a command that extracts bits from a variable? I think 'bit' does
>    the trick, so bit 1 is the first bit of a and bit 2 is the 2nd bit of a
>    and bit 3 the 3rd, ... and I think it sets the zero flag for 1 and the
>    nonzero flag for 0. Is this correct?
Yes: 'bit' does the trick, but z is set on '0' and nz on '1'
Example:

BHL_Plus_DE:
  add hl,de
  bit 7,h ; the 8th bit
  ret nz
  
  inc b
  res 7,h ; the 8th bit
  set 6,h ; the 7th bit
  
  ret

in C:

 if(hl == 0x8000){ //bit 7 is set;
   b++;
   hl = 0x4000 // reset bit 7, set bit 6
 }

compare the following if you don't get it

bit from h:     bits from l:
7(8000h)	7(80h)
6(4000h)	6(40h)
5(2000h)	5(20h)
4(1000h)	4(10h)
3(800h)		3(8h)
2(400h)		2(4h)
1(200h)		1(2h)
0(100h)		0(1h)

Even more serious comments below:
> 
> PWM:
> 
> Didn't test it, but this should work. The 'on' pulse is a bit longer than
> the 'off' pulse.
> 
> begin:
>     ld c,0
> loop:
>     bcall(_getky)
>     cp kDown
>     call z, incc    ;speed down
>     cp kUp
>     call z, decc    ;speed up
>     cp kClear
>     ret z
>     ld a,C3    ;off
>     out(00),a
>     call wait
>     ld a,C0    ;on
>     call wait
>     jp loop
> incc:
>     inc c \ ret
> decc:
>     dec c \ ret
> wait:
      ld b,c
>     ei 
waitloop:
      halt \ djnz waitloop \ ret
> 

AFAIK, b is being decremented along the djnz, so I made b being
loaded from c each time 

> 
> 
> 
> 
> 
> 




References: