Re: A86: Re: opcodes affecting flags


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Re: A86: Re: opcodes affecting flags




>
>(BTW, does anyone have a list of exactly what opcodes affect the 
>flags?)

look for z80iss.txt or z80href.txt.  this is from z80href.txt, everything
that doesn't affect the flags has been removed:

-josh

Mnemonic    Flags   Description           Notes
            SZHPNC
ADC A,s     ***V0*  Add with Carry        A=A+s+CY
ADC HL,ss   **?V0*  Add with Carry        HL=HL+ss+CY
ADD A,s     ***V0*  Add                   A=A+s
ADD HL,ss   --?-0*  Add                   HL=HL+ss
ADD IX,pp   --?-0*  Add                   IX=IX+pp
ADD IY,rr   --?-0*  Add                   IY=IY+rr
AND s       ***P00  Logical AND           A=A&s
BIT b,m     ?*1?0-  Test Bit              m&{2^b}
CCF         --?-0*  Complement Carry Flag CY=~CY
CP s        ***V1*  Compare               A-s
CPD         ****1-  Compare and Decrement A-[HL],HL=HL-1,BC=BC-1
CPDR        ****1-  Compare, Dec., Repeat CPD till A=[HL]or BC=0
CPI         ****1-  Compare and Increment A-[HL],HL=HL+1,BC=BC-1
CPIR        ****1-  Compare, Inc., Repeat CPI till A=[HL]or BC=0
CPL         --1-1-  Complement            A=~A
DAA         ***P-*  Decimal Adjust Acc.   A=BCD format
DEC s       ***V1-  Decrement             s=s-1
IN r,[C]    ***P0-  Input                 r=[C]
INC r       ***V0-  Increment             r=r+1
INC [HL]    ***V0-  Increment             [HL]=[HL]+1
INC [xx+d]  ***V0-  Increment             [xx+d]=[xx+d]+1
IND         ?*??1-  Input and Decrement   [HL]=[C],HL=HL-1,B=B-1
INDR        ?1??1-  Input, Dec., Repeat   IND till B=0
INI         ?*??1-  Input and Increment   [HL]=[C],HL=HL+1,B=B-1
INIR        ?1??1-  Input, Inc., Repeat   INI till B=0
LD A,i      **0*0-  Load                  A=i            (i=I,R)
LDD         --0*0-  Load and Decrement    [DE]=[HL],HL=HL-1,#
LDDR        --000-  Load, Dec., Repeat    LDD till BC=0
LDI         --0*0-  Load and Increment    [DE]=[HL],HL=HL+1,#
LDIR        --000-  Load, Inc., Repeat    LDI till BC=0
NEG         ***V1*  Negate                A=-A
OR s        ***P00  Logical inclusive OR  A=Avs
OTDR        ?1??1-  Output, Dec., Repeat  OUTD till B=0
OTIR        ?1??1-  Output, Inc., Repeat  OUTI till B=0
OUTD        ?*??1-  Output and Decrement  [C]=[HL],HL=HL-1,B=B-1
OUTI        ?*??1-  Output and Increment  [C]=[HL],HL=HL+1,B=B-1
RL m        **0P0*  Rotate Left           m={CY,m}<-
RLA         --0-0*  Rotate Left Acc.      A={CY,A}<-
RLC m       **0P0*  Rotate Left Circular  m=m<-
RLCA        --0-0*  Rotate Left Circular  A=A<-
RLD         **0P0-  Rotate Left 4 bits    {A,[HL]}={A,[HL]}<- ##
RR m        **0P0*  Rotate Right          m=->{CY,m}
RRA         --0-0*  Rotate Right Acc.     A=->{CY,A}
RRC m       **0P0*  Rotate Right Circular m=->m
RRCA        --0-0*  Rotate Right Circular A=->A
RRD         **0P0-  Rotate Right 4 bits   {A,[HL]}=->{A,[HL]} ##
SBC A,s     ***V1*  Subtract with Carry   A=A-s-CY
SBC HL,ss   **?V1*  Subtract with Carry   HL=HL-ss-CY
SCF         --0-01  Set Carry Flag        CY=1
SLA m       **0P0*  Shift Left Arithmetic m=m*2
SRA m       **0P0*  Shift Right Arith.    m=m/2
SRL m       **0P0*  Shift Right Logical   m=->{0,m,CY}
SUB s       ***V1*  Subtract              A=A-s
XOR s       ***P00  Logical Exclusive OR  A=Axs




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